DOI: 10.21276/sjet

Pages: 267-269

High speed Low power multiply and accumulate design is the key component of the high performance filter application design. The developed design aims primarily at the improvement in speed of the multiplication and reduction in power dissipation. In this developed design main goal was to find the better solution to the multiply and accumulate (MAC) unit used in filtering units of digital signal processing, image processing etc. The multiply and accumulate unit is developed with radix-4 modified booth multiplier whose partial products are added by the developed novel carry select adder. Most of the filtering applications demand increased speed and reduction in power consumption as the main criteria in their design where developed design supports both the requirements of it.